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A novel ultra high-throughput detection algorithm with an efficient VLSI architecture for high-order MIMO detectors in the complex constellations is proposed. The main contributions include a new method for the node generation in complex-domain, pipelinable sorters, and a simple combinational circuit instead of the conventional multipliers, which makes the proposed architecture multiplication-free
The current literature lacks the VLSI realization of high-order multiple-input-multiple-output (MIMO) detectors in the complex domain, which finds applications in advanced wireless standards such as WiMAX and Long Term Evolution (LTE) systems. In this paper, a novel modified complex K-Best algorithm and its VLSI implementation for a 4൴, 64QAM complex MIMO detector are proposed. The main contributi
A novel detection algorithm with an efficient VLSI architecture featuring efficient operation over infinite complex lattices is proposed. The proposed design results in the highest throughput, the lowest latency, and the lowest energy compared to the complex-domain VLSI implementations to date. The main innovations are a novel complex-domain means of expanding/visiting the intermediate nodes of th
Measuring MIMO-SAR is an important part of mobile handset evaluation, following the introduction of uplink MIMO transmission schemes in LTE-Advanced. However, the measurement of MIMO-SAR is complex and time-consuming. In this paper, 6 unique dual-antenna mobile handsets, including both typical and novel designs, are analyzed to determine the dependence of MIMO-SAR on antenna configuration and corr
In this paper, a novel hard-output detection algorithm for the complex multiple-input multiple-output (MIMO) detectors is proposed, which results in a significant throughput enhancement, a near-ML performance, and an SNR-independent fixed-throughput. Moreover, a high-throughput VLSI implementation is proposed, which is based on a novel method of the node generation and sorting scheme. The proposed
Abstract: Long Term Evolution (LTE) supports peak data rates in excess of 300 Mb/s. A good approach to achieve such rates is by parallelizing the required processing in turbo decoders. An interleaver is an important part of a turbo decoder. LTE uses the Quadratic Permutation Polynomial (QPP) interleaver, which makes it suitable for parallel decoding. In this paper, we propose an efficient architec
A novel low-complexity detection scheme is proposed for the multiple-input multiple-output (MIMO) single-carrier frequency division-multiple access (SC-FDMA) systems, which is suitable for ASIC implementations. The proposed detection scheme makes an initial estimate of the transmitted signal based on a minimum mean square error (MMSE) frequency domain equalizer (FDE) detector and finds symbols wit
Purpose – Supply chains evolve and change in size, shape and configuration, and in how they are coordinated, controlled and managed. Some supply chains are mature and relatively unchanging. Some are subject to significant change. New supply chains may emerge and evolve for a variety of reasons.The purpose of this paper is to examine the nature of supply chain evolution and address the question “Wh
Purpose – The purpose of this paper is to examine the value chain processes that represent the “black box” between supply logistics integration and competitive operational performance in firms. To realize this objective, the authors develop a research model which comprises a series of linkages from supply logistics integration to operational outcomes using Porter’s concept of value chain and the r
We investigate the relationship between product and supply chain architectures. Both products and supply chains can have modular as well as integral designs. We synthesize previous research on both product and supply chain architectures and explore this relationship in a multi-method study, including a survey of 82 manufacturing firms and a multiple-case study of ten products and their respective
