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A 65-nm CMOS Area Optimized De-synchronization Flow for sub-V-T Designs

This paper proposes a process independent post layout de-synchronization flow implemented in tool command language working on designs operating in the sub-V-T regime. The overhead due to the self-timed operation is combated by introducing full-custom delay elements and latches for a standard 65-nm CMOS process. The flow offers the possibility to adjust granularity based on user requirements. Case

Weakly Fair Allocations and Strategy-Proofness

This paper investigates the problem of allocating two types of indivisible objects among a group of agents when a priority-order must be respected and only restricted monetary transfers are allowed. Since the existence of a fair (as in envy-free) allocation is not generally guaranteed, due to the restrictions on the money transfers, the concept of fairness is weakened, and a new concept of fairnes

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Abstract in Italian Questo articolo tratta del ruolo importante che il sistema Ghent ed altre caratteristiche delle relazioni industriali in Svezia rivestono nel mantenimento di alti livelli di densità sindacale in Svezia. Il governo di centro-destra, insediatosi in seguito alle elezioni parlamentari nel settembre 2006, nel 2007 ha introdotto o tentato di introdurre modifiche sostanziali nelle ass

Automatic generation of application-specific systems based on a micro-programmed Java core

This paper describes a co-design based approach for automatic generation of application specific systems, suitable for FPGA-centric embedded applications. The approach augments a processor core with hardware accelerators extracted automatically from a high-level specification (Java) of the application, to obtain a custom system, optimised for the target application. We advocate herein the use of a